目录

文档目录

活动timeline	时间	Topics
	第一周	（GPU & GPU Programming） 1.1 - MLSys on GPU (SIMD/SIMT、throughput vs latency) 1.2 - CUDA Programming Model：thread coordination & execution ( grid/block/thread、kernel launch、host/device、warp ) 1.3 - Triton/TileLang: CTA Level Programming (program/block、tile abstraction、elementwise kernel)
	第一周	（Memory Abstraction） 1.4 - Optimizing a Kernel(roofline intuition、global/shared/register hierarchy) 1.5 - Data reuse in shared memory (gemm tiling、 DSL shared tiling) 1.6 - Careful data movement(coalescing、bank conflict、padding/swizzle)
	第二周	（Tensor Core） 1.7 - Under T.gemm: What is Tensor Core (MMA tile shape, Why shape matter, Comparing with CUDA Core) 1.8 - Tensor Core and Layout (Operand fragment layout、A/B/C Layout) 1.9 – Describing Tensor Core capability with Layout (CuTe Layout Algebra、shared memory swizzle for TC)
	第二周	（Pipeline Ordering） 1.10 - Double buffer： Space-time trading off (multi-buffer = shared memory -> dependence distance) 1.11 - TMA：Async date movement with hardware (TMA copy、descriptor、in-flight、comparing with cp.async) 1.12- Warp specialization： producer/consumer warpgroup
	第三周	（DSL & ML Compiler ） 1.13 - DSL in First Principle: What DSL, Why DSL, and How DSL 1.14 – Evo-Devo of GPU DSL and ML Compiler 1.15 - Auto pipelining (TileLang autoschedule：Input task graph = schedule + barrier + buffer) 1.16 – Graph Level：fusion , graph compiler, and more
	第三周	(Hardware & SoL Kernel Explained) 1.17 - Hardware Evo-Devo: From Volta to Blackwell 1.18 - Domain Specific Accelerator: NPU 1.19 - SoL GEMM Explained 1.20 - SoL Attn Explained
	Guest Lecture – Topic1
	第四周	(Communication Hardware Architecture) 2.0 From Circuits to Modern Computing Systems: A Unified, Forward-Looking Perspective
	第四周	2.1 Interconnect Design Inside AI Servers 2.2 Network Infrastructure: NIC, Switch and Network Topology 2.3 Scale-Up vs. Scale-Out Communication 2.4 Reduction Offloading: SHARP vs. CCU (Communication Software Stack) 2.5 Collective Communication Library 2.6 P2P Communication 2.7 EP and MoE Communication (Communication Optimization) 2.8 Compute–Communication Overlap (including Distributed Kernel) 2.9 Communication–Memory–Storage Co-design
	Guest Lecture - Topic2
	第五周	3.1 推理系统的核心：目标、指标、benchmark 3.2 PD 分离与计算过程
	第五周	3.3 以 KV Cache 为核心的系统 3.4 Batching
	第六周	3.5 Kernel 层：attention 与 MoE 3.6 MTP 和投机解码
	第六周	3.7 并行策略 3.8 常见框架介绍，目前的推理演进
	Guest Lecture - Topic3
	第七周	4.1 RL 算法初识：PPO，XXPO，OPD 4.2 RL 框架演进：OpenRLHF、veRL 4.3 RL 中的长尾问题（一）：请求调度与资源分配 4.4 RL 中的长尾问题（二）：从同步到异步
	第七周	4.5 RL 中的投机解码：面向 Rollout 的系统性加速 4.6 RL 中的训练稳定性：训推一致性与容错 4.7 Agentic RL：环境、沙箱与异构硬件的系统工程
	Guest Lecture - Topic4